Slix Tool - About

Current Issues
Manufacturers of electronic equipment are challenged to bring differentiated products to market quickly. These competitive pressures often require the use of custom-designed ASICs, which result in higher- design risks, non-recurring-engineering costs (NRE) and time delays.
ASIC Requirements Average seat of EDA tools $200K/engineer HDL simulation Synthesis Timing analysis Test insertion Place and route Formal verification Floorplanning DRC Usually involves multiple EDA vendors	FPGA Requirements Average seat $2K-$3K/yr Simulation Synthesis Place and route Adequate tools provided by FPGA vendors Value-added tools from EDA vendors~$20-30K
Field Programmable Logic Array (FPGA) is an industry adapted alternative solution to this problem. FPGA design methodology has the capacity to handle design complexity of the job, but requires extensive and costly design resources with highly trained FPGA designers. Hence, there is a tremendous need for efficient and cost effective FPGA design tools that can be used by FPGA designers. Such technology would enable them to spread the use of FPGA-based products and shorten the product cycle times to meet the rapidly evolving needs of electronic product applications.
Solution - Slix Tool

Slix™Tool, an automatic IP generation software, relieves the FPGA designer who is currently burdened by the requirement to understand the functionality provided by each and every IP core in order to implement proper connectivity in the top level FPGA design. Slix™Tool provides an easy to use interface to select and customize individual IP cores. It is an expert system, so it can automatically generate FPGA design; and it allows to target the FPGA design to multiple FPGA vendor devices (Actel, Altera, Lattice, Xilinx), without needing to know individual FPGA design tools.